1. Field of the Invention
The present invention relates to semiconductor devices, and more particularly, to a method for manufacturing a semiconductor device, which eliminates a hole-current path located under an N+ cathode area of a lateral insulated gate bipolar transistor (LIGBT) structure. A sufficient latch-up current density is thereby secured.
2. Discussion of the Related Art
A bipolar-mode field effect transistor (FET) includes a structure having a vertical junction FET. The bipolar-mode FET is used as a power semiconductor device exhibiting high current capacity, low on-resistance, and high switching speed. Due to a conductivity modulation effect of an epitaxial layer, bipolar-mode FETs exhibit a higher current gain and a lower saturation voltage than a bipolar junction transistor. Since an element structure has no junction along a current path, a bipolar-mode FET has a higher switching speed than a MOS-gate driven power device. An important design parameter of the bipolar-mode FET includes its gate structure, in which a gate length is equal to a channel length or the distance between gates. Another important design parameter includes the impurity density of an epitaxial layer. These parameters determine a normal-off characteristic, current gain, and switching capacity.
Also, lateral power devices are suitable for power IC applications. A device on a semiconductor-on-insulator substrate is implemented and has excellent characteristics, superior to those of a junction isolation device, such as a lower leakage current, a higher integration degree, and a higher removal rate of parasitic components. Lateral power devices include a lateral double-diffused MOS device, which has a very high on-resistance, and a MOS-gate bipolar power device, such as an LIGBT device or a lateral MOS-controlled thyristor, which has a very long turn-off time due to a recombination of minor carriers.
FIG. 1 illustrates a semiconductor device having a related art LIGBT structure including a gate 106, a cathode 107, and an anode 105 deposited on a P-type semiconductor silicon substrate 101. A PNP bipolar transistor is composed of a P+ anode 104, a N drift region 102, and a P+ cathode 103. In an “on” state of the PNP bipolar transistor, a hole current (Ih) is injected into the P+ anode 104 and passes the P+ cathode via a P-type base area located under the N+ cathode 108, that is, through a base resistance RB. If a voltage drop of RB×Ih exceeds approximately 0.7V, a parasitic NPN bipolar transistor composed of the N+ cathode 108, the P-base area, and the N drift region 102 operates in a condition referred to as a latch-up. If the parasitic NPN bipolar transistor enters a latch-up mode, the transistor is no longer controllable by the voltage level of the gate 106.